Our Expertise in Analog & Mixed Signal Design

Custom Circuit / IO Circuit / Serdes Design

  • AMS circuit design
  • High-speed IO design
  • SerDes PHYs
  • IO libraries
  • Power management units
  • Low power custom circuit design
  • Custom SRAM/DRAM/TCAM design
  • PLLs, DLLs & Oscillators
  • DACs and ADCs
  • Complete Analog & Mixed Signal Design from specs to GDSII
  • Design specification, Architecture & partition
  • Expertise for developing Full IP & Block level
  • Develop the design modelling (Verilog-A & V-AMS Modelling) such as timing, behavior model or AMS-Verilog model
  • IP conversion: new process nodes (CMOS/FinFET process node: 3nm, 5nm, 7nm, 10nm, 14nm, 22nm, 45nm, 65nm, 90nm, 130nm, 180nm & 350nm ) & technologies
  • Porting the designs to advance process nodes to improve design performance

Mixed-Signal Verification

  • Analog IP design verification
  • Test Bench Creation
  • Full top-level verification in both UVM and direct methodologies
  • Power aware, GLS simulations
  • Stress testing, performance analysis
  • Fault injection
  • Automated Checkers Development
  • Bug Identification & Correction

Mixed-Signal Layout Design

  • High Speed AMS Design and Layout
  • RF Layout
  • IO Design and Layout
  • Standard Cell Design and Layout
  • Physical Layout